IDTCSPT855 Datasheet PDF - Renesas 2.5V PHASE LOCKED LOOP CLOCK DRIVER Specs

IDTCSPT855 - 2.5V PHASE LOCKED LOOP CLOCK DRIVER

Datasheet Summary

Description

The CSPT855 is a high-performance, low-skew, low-jitter zero delay buffer that distributes one differential clock input pair(CLK, CLK ) to four differential output pairs (Y [0:3], Y [0:3]) and one differential pair of feedback clock outputs (FBOUT, FBOUT).

Features

PLL clock driver for DDR (Double Data Rate) synchronous DRAM.

Datasheet Details

Part number	IDTCSPT855
Manufacturer	Renesas
File Size	228.88 KB
Description	2.5V PHASE LOCKED LOOP CLOCK DRIVER
Datasheet	IDTCSPT855 Datasheet
Additional preview pages of the IDTCSPT855 datasheet.

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Full PDF Text Transcription

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IDTCSPT855 2.5V PLL CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 2.5V PHASE LOCKED LOOP CLOCK DRIVER IDTCSPT855 FEATURES: • PLL clock driver for DDR (Double Data Rate) synchronous DRAM applications • Spread spectrum clock compatible • Operating frequency: 60MHz to 220MHz • Low jitter (cycle-to-cycle): ±50ps • Distributes one differential clock input to four differential clock outputs • Enters low power mode and 3-state outputs when input CLK signal is less than 20MHz or PWRDWN is low • Operates from a 2.

Published: May 26, 2024 |