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IDTCV123 - PROGRAMMABLE CLOCK

General Description

IDTCV123 is a 56 pin clock device.

The CPU output buffer is designed to support up to 400MHz processor.

This chip has three PLLs inside for CPU/ SRC/PCI, SATA, and 48MHz/DOT96 IO clocks.

Key Features

  • One high precision PLL for CPU, with SSC and N programmable.
  • One high precision PLL for SRC/PCI/SATA, SSC and N programmable.
  • One high precision PLL for 96MHz/48MHz.
  • Band-gap circuit for differential outputs.
  • Supports spread spectrum modulation, down spread 0.5%.
  • Supports SMBus block read/write, index read/write.
  • Selectable output strength for REF.
  • Allows for CPU frequency to change to a higher frequency for maximum system.

📥 Download Datasheet

Datasheet Details

Part number IDTCV123
Manufacturer Renesas
File Size 252.00 KB
Description PROGRAMMABLE CLOCK
Datasheet download datasheet IDTCV123 Datasheet

Full PDF Text Transcription for IDTCV123 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for IDTCV123. For precise diagrams, and layout, please refer to the original PDF.

IDTCV123 PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR COMMERCIAL TEMPERATURE RANGE PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR IDTCV123 FEATURES: • One high precision PLL ...

View more extracted text
C™ CLOCK FOR P4 PROCESSOR IDTCV123 FEATURES: • One high precision PLL for CPU, with SSC and N programmable • One high precision PLL for SRC/PCI/SATA, SSC and N programmable • One high precision PLL for 96MHz/48MHz • Band-gap circuit for differential outputs • Supports spread spectrum modulation, down spread 0.5% • Supports SMBus block read/write, index read/write • Selectable output strength for REF • Allows for CPU frequency to change to a higher frequency for maximum system computing power • Available in SSOP package OUTPUTS: • 2*0.7V current –mode differential CPU CLK pair • 8*0.