IDTCV145 Overview
The CV145 differential buffer plies with Intel DB1900G , and is designed to work in conjunction with the main clock of CK409, CK410/CK410M and CK410B etc., PLL is off in bypass mode and no clock detect. FUNCTIONAL BLOCK DIAGRAM OE_17_18# OE[16:5]# OE_01234# PD# Output Control SCL SDA SA_2/PLL_BYPASS# CLK_IN CLK_IN# HIGH_BW# SM Bus Controller PLL The IDT logo is a registered trademark of Integrated Device Technology,...
IDTCV145 Key Features
- pliant with Intel DB1900G
- DIF Clock Support
- 19 differential clock output pairs @ 0.7 V
- 150 ps skew performance across all outputs
- OE pin Control of All Outputs
- 3.3 V Operation
- Gear Ratio supporting generation of clocks at a different frequency ratioed from the input
- Split outputs supporting options of 2 outputs @1:1 and remaining 17 pairs at an alternate gear
- Pin level OE control of individual outputs
- Multiple output frequency options up to 400Mhz as a gear ratio of input clocks of 100-400Mhz
