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ISL9000A - Dual LDO

General Description

Supply Voltage/LDO Input: Connect a 1µF, X5R ceramic capacitor to GND.

Low Voltage Compatible LDO-1 Enable.

Low Voltage Compatible LDO-2 Enable.

Key Features

  • Integrates two 300mA high performance LDOs.
  • Excellent transient response to large current steps.
  • ±1.8% accuracy over all operating conditions.
  • Excellent load regulation: < 0.1% voltage change across full range of load current.
  • Low output noise: typically 30µVRMS @ 100µA (1.5V).
  • Very high PSRR: 90dB @ 1kHz.
  • Extremely low quiescent current: 42µA (both LDOs active).
  • Wide input voltage capability: 2.3V to 6.5V.
  • Low dro.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DATASHEET ISL9000A Dual LDO with Low Noise, Very High PSRR and Low IQ FN6391 Rev 3.00 October 15, 2015 ISL9000A is a high performance dual LDO capable of sourcing 300mA current from each output. It has a low standby current and very high PSRR and is stable with output capacitance of 1µF to 10µF with ESR of up to 200m. The device integrates an individual Power-On-Reset (POR) function for each output. The POR delay for VO2 can be externally programmed by connecting a timing capacitor to the CPOR pin. The POR delay for VO1 is internally fixed at approximately 2ms. A reference bypass pin is also provided for connecting a noise filtering capacitor for low noise and highPSRR applications. The quiescent current is typically only 42µA with both LDO’s enabled and active.