Datasheet4U Logo Datasheet4U.com

MK74CG117A - 16 OUTPUT LOW SKEW CLOCK GENERATOR

Datasheet Summary

Description

The MK74CG117A is a monolithic CMOS high-speed, low-skew clock driver that includes an on-chip PLL.

Features

  • 48-pin SSOP (300 mil) package.
  • On-chip PLL generates output clocks up to 90 MHz from a simple crystal or clock input.
  • 16 low-skew outputs.
  • Output skew less than 350 ps on rising edges.
  • Ability to configure as.
  • 16 clocks at full-frequency.
  • 12 at full and 4 at half-frequency.
  • 8 at full and 8 at half-frequency.
  • Tri-state mode for Output Enable function.
  • 3.3 V ±5% supply voltage Block Diagram S2:0 3 2 M1:0.

📥 Download Datasheet

Datasheet preview – MK74CG117A

Datasheet Details

Part number MK74CG117A
Manufacturer Renesas
File Size 311.38 KB
Description 16 OUTPUT LOW SKEW CLOCK GENERATOR
Datasheet download datasheet MK74CG117A Datasheet
Additional preview pages of the MK74CG117A datasheet.

📁 Similar Datasheet

  • MK74CB115 - 1 to 16 Buffalo Clock Driver (Integrated Circuit Systems)
  • MK74CB163 - 1 to 16 PECL to CMOS Buffalo Clock Driver (Integrated Circuit Systems)
  • MK74CB214 - Dual 1 to 7 Buffalo Clock Driver (Integrated Circuit Systems)
  • MK74CB217 - Dual 1 to 8 Buffalo Clock Driver (Integrated Circuit Systems)
  • MK74CB218 - Dual 1 to 8 Buffalo Clock Driver (Integrated Circuit Systems)
  • MK74CB44 - Quad 1 to 4 Buffalo Clock Driver (Integrated Circuit Systems)
  • MK74ZD133 - PLL and 32-Output Clock Driver (Integrated Circuit Systems)
  • MK71050-03 - Low Energy wireless module (LAPIS Semiconductor)
  • MK712 - Touch Screen Controller (Integrated Circuit Systems)
  • MK71251-01 - Bluetooth Smart wireless module (LAPIS)
Other Datasheets by Renesas

Full PDF Text Transcription

Click to expand full text
16 OUTPUT LOW SKEW CLOCK GENERATOR DATASHEET MK74CG117A Description The MK74CG117A is a monolithic CMOS high-speed, low-skew clock driver that includes an on-chip PLL. Ideal for communications and other systems that require a large number of high-speed clocks, the unique combination of PLL and 16 low-skew outputs can eliminate oscillators and low-skew buffers from systems. The device has a number of built-in multipliers, making it possible to run from one inexpensive, low-frequency crystal, and produce high-frequency clock outputs. Another selection allows the chip to run as a divider, dividing the input clock by two (or 4 using the mode select). The device also has a buffered reference output, allowing multiple devices to be easily driven from one clock source.
Published: |