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MPC9773 - LVCMOS PLL Clock Generator

Product Overview

Renesas

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MPC9773 LVCMOS PLL Clock Generator by Renesas - Datasheet Preview — Datasheet preview – MPC9773

Datasheet Details

Part number	MPC9773
Manufacturer	Renesas
File Size	524.75 KB
Description	LVCMOS PLL Clock Generator
Datasheet	MPC9773 Datasheet
Additional preview pages of the MPC9773 datasheet.

Product details

Description

The MPC9773 utilizes PLL technology to frequency lock its outputs onto an input reference clock.

Normal operation of the MPC9773 requires the connection of the PLL feedback output QFB to feedback input FB_IN to close the PLL feedback path.

Features

1:12 PLL based low-voltage clock generator.
3.3 V power supply.
Internal power-on reset.
Generates clock signals up to 242.5 MHz.
Maximum output skew of 250 ps.
Differential PECL reference clock input.
Two LVCMOS PLL reference clock inputs.
External PLL feedback supports zero-delay capability.
Various feedback and output dividers (refer to.

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Published: Apr 20, 2021 |