R5F10Y44 Overview
Datasheet RL78/G10 Nov 19, 2014 1. OUTLINE Ultra-Low Power Technology 2.0 to 5.5 V operation from a single supply Stop (RAM retained): 0.56 µA Operating: 46 µA /MHz RL78-S1 Core Instruction execution: 78 % of instructions can be Main Flash Memory Density: 1 to 4 Kbyte Flash memory rewritable voltage: 4.5 to 5.5 V RAM 128 to 512 Byte size options Supports operands or instructions Back-up retention in all modes High-speed On-chip Oscillator 20 MHz with +/-2 % accuracy over voltage (2.0 to
R5F10Y44 Key Features
- 2.0 to 5.5 V operation from a single supply
- Stop (RAM retained): 0.56 µA
- Operating: 46 µA /MHz
- Instruction execution: 78 % of instructions can be
- CISC architecture (Harvard) with 3-stage pipeline
- Multiply: 8 x 8 to 16-bit result in 2 clock cycles
- 16-bit barrel shifter for shift & rotate in 2 clock cycle
- 1-wire on-chip debug function
- Density: 1 to 4 Kbyte
- Flash memory rewritable voltage: 4.5 to 5.5 V