Additional preview pages of the R5F110MJ datasheet.
Product details
Features
Ultra-low power consumption technology.
VDD = single power supply voltage of 1.6 to 3.6 V.
HALT mode.
STOP mode.
SNOOZE mode
RL78 CPU core.
CISC architecture with 3-stage pipeline.
Minimum instruction execution time: Can be changed from high
speed (0.04167 μs: @ 24 MHz operation with high-speed on-chip oscillator clock or PLL clock) to ultra-low speed (30.5 μs: @ 32.768 kHz operation with subsystem clock).
R5F110MJ Datasheet
