Additional preview pages of the R5F11BBEAFP datasheet.
R5F11BBEAFP Product details
Features
Ultra-low power consumption technology.
VDD = single power supply voltage of 1.6 to 5.5 V which can operate a 1.8 V device at a low voltage.
HALT mode.
STOP mode.
SNOOZE mode
RL78 CPU core.
CISC architecture with 3-stage pipeline.
Minimum instruction execution time: Can be changed
from high speed (0.03125 μs: @ 32 MHz operation with high-speed on-chip oscillator) to ultra-low speed (30.5 μs: @ 32.768 kHz operation with subsystem clock).
R5F11BBEAFP Datasheet
