R5F11TLG
Features
<R> Target application
- Power meters
Ultra-low power consumption technology
- VDD = single power supply voltage of 1.7 to 5.5 VNote 1
- HALT mode
- STOP mode
- SNOOZE mode
RL78 CPU core
- CISC architecture with 3-stage pipeline
- Minimum instruction execution time: Can be changed from high speed (0.03125 µs: @ 32 MHz selection with PLL clock, 0.04167 µs: @ 24 MHz selection with high-speed on-chip oscillator) to ultra-low speed (66.6 µs: @ 15 k Hz operation with low-speed on-chip oscillator)
- 16-bit multiplication, 16-bit multiply-accumulation, and 32-bit division are supported.
- Address space: 1 MB
- General-purpose registers: (8-bit register × 8) × 4 banks
- On-chip RAM: 6 KB to 16 KB
Code flash memory
- Code flash memory: 64 KB to 256 KB
- Block size: 1 KB
- Prohibition of block erase and rewriting (security function)
- On-chip debug function
- Self-programming (with boot swap function/flash shield window...
