Click to expand full text
Datasheet
RX111 Group
R01DS0190EJ0121
Renesas MCUs
Rev.1.21
32 MHz 32-bit RX MCUs, 50 DMIPS, up to 512 Kbytes of flash memory,
Dec 09, 2014
USB 2.0 full-speed host/function/OTG, up to 6 comms channels,
12-bit A/D, 8-bit D/A, RTC
Features
■ 32-bit RX CPU core 32 MHz maximum operating frequency Capable of 50 DMIPS when operating at 32 MHz Accumulator handles 64-bit results (for a single instruction) from 32-bit × 32-bit operations Multiplication and division unit handles 32-bit × 32-bit operations (multiplication instructions take one CPU clock cycle) Fast interrupt CISC Harvard architecture with five-stage pipeline Variable-length instruction format, ultra-compact code On-chip debugging circuit
■ Low power consumption functions Operation from a single 1.8 to 3.