R5F51405ADFM Overview
Datasheet RX140 Group R01DS0379EJ0120 Renesas MCUs Rev.1.20 Nov 22, 2024 48-MHz, 32-bit RX MCUs, on-chip FPU, 204 Coremark, up to 256-KB flash memory, up to 36 pins capacitive touch sensing unit, up to 9 ms channels, 12-bit A/D, D/A, RTC, IEC60730 pliance,.
R5F51405ADFM Key Features
- 32-bit RXv2 CPU core
- Maximum operating frequency: 48 MHz Capable of 204 Coremark in operation at 48 MHz
- Enhanced DSP instructions: 32-bit multiply-accumulate instructions, and 16-bit multiply-subtract instructions are suppor
- On-chip FPU: 32-bit single-precision floating point pliant with IEEE-754
- On-chip divider that operated at the fastest of two clock cycles
- Fast interrupt
- CISC Harvard architecture with 5-stage pipeline
- Variable-length instructions, ultra-pact code
- On-chip debugging circuit
- Low power design and architecture