R5F52305ADND Description
Datasheet RX230 Group, RX231 Group Renesas MCUs R01DS0261EJ0120 Rev.1.20 Sep 28, 2018 54-MHz 32-bit RX MCUs, built-in FPU, 88.56 DMIPS, up to 512-KB flash memory, various munication functions including USB 2.0 full-speed host/function/OTG, CAN, SD host.
R5F52305ADND Key Features
- 32-bit RXv2 CPU core
- Max. operating frequency: 54 MHz Capable of 88.56 DMIPS in operation at 54 MHz
- Enhanced DSP: 32-bit multiply-accumulate and 16-bit multiply-subtract instructions supported
- Built-in FPU: 32-bit single-precision floating point (pliant to IEEE754)
- Divider (fastest instruction execution takes two CPU clock cycles)
- Fast interrupt
- CISC Harvard architecture with 5-stage pipeline
- Variable-length instructions, ultra-pact code
- On-chip debugging circuit
- Memory protection unit (MPU) supported