R5H30211 Description
R5H30211 Renesas Microputer REJ03B0259-0110 Rev.1.10 Jun. 05, 2009 Overview This LSI is a single-chip microcontroller unit (MCU) built around the H8/300H CPU. Four I/O ports, ROM, RAM, EEPROM, a random number generator (RNG), a watchdog timer (WDT), a firewall management unit (FMU), interval timers (TMR1/TMR2), I2C bus interface (IIC2), synchronous serial munication unit (SSU), and a coprocessor are included.
R5H30211 Key Features
- High-speed operation Maximum clock rate: internal clock 10 MHz Add/subtract: 0.20 µs (10 MHz) Multiply/divide: 1.4
- Streamlined, concise instruction set 16-bit variable instruction length: 2 to 10 bytes arithmetic and logic operatio
- Register-indirect specification of bit positions EEPROM write instruction (EEPMOV.B instruction) High-speed block tr
- Four general-purpose input/output ports (Also used for interrupts) Note: When writing to the DDR7 to DDR4 bits, use the
- Random number generator (RNG) Watchdog timer (WDT)
- Firewall management unit (FMU) Interval timer (TMR1/TMR2) Modular multiplication coprocessor
- ROM: 112 kbytes RAM: 4 kbytes Generates 16-bit random numbers. Interrupts can be generated on pletion