SLG46517 Datasheet | Renesas

Description The SLG46517 provides a small, low power ponent for monly used Mixed-Signal functions. The user creates their circuit design by programming the one time programmable (OTP) Non-Volatile Memory (NVM) to configure the interconnect logic, the IO Pins, and the macrocells of the SLG46517. This highly versatile device allows a wide variety of Mixed-Signal functions to be designed within a very small, low power single integrated circuit. Key Features - Four Analog parators - Voltage Reference - Seventeen bination Function Macrocells - Three Selectable DFF/LATCH or 2-bit LUTs - One Selectable Continuous DFF/LATCH or 3-bit LUT - Four Selectable DFF/LATCH or 3-bit LUTs - One Selectable Pipe Delay or 3-bit LUT - One Selectable Programmable Pattern Generator or 2-bit LUT - Five 8-bit Delays/Counters or 3-bit LUTs - Two 16-bit Delays/Counters or 4-bit LUTs - Asynchronous State Machine - Eight States - Flexible Input Logic from State Transitions - Serial munications - I2C Protocol Interface - Pipe Delay - 16 Stage/3 Output (Part of bination Function Macrocell) - Programmable Delay - Additional Logic Functions - 2 Deglitch Filters with Edge Detectors - Two Oscillators - Configurable 25 k Hz/2 MHz - 25 MHz RC Oscillator - Crystal Oscillator - Power-On Reset - Eight Byte RAM + OTP User Memory - RAM Memory Space that is Readable and Writable via I2C - User Defined Initial Values Transferred from OTP - P-FET Power Switch - Power Switch IDS: 2 A - VIN: 1.71 V to 5.5 V - Low RDSON - 44 mΩ @ 5.5 V - 58 mΩ @ 3.3 V - 110 mΩ @ 1.71...