SLG46535 Datasheet | Renesas

Features - Logic & Mixed Signal Circuits - Highly Versatile Macrocells - Read Back Protection (Read Lock) - 1.8 V (±5%) to 5 V (±10%) VDD - 1.8 V (±5%) to 5 V (±10%) VDD2 (VDD2 ≤ VDD) - Operating Temperature Range: -40°C to 85°C - Ro HS pliant / Halogen-Free - 14-pin STQFN: 2 x 2.2 x 0.55 mm, 0.4 mm pitch Applications - Personal puters and Servers - PC Peripherals - Consumer Electronics - Data munications Equipment - Handheld and Portable Electronics Pin Configuration GPIO GPIO VDD GPI GPIO GPIO GPIO 1 2 14 12 13 11 GPIO VDD2 GPIO GND GPIO 14-pin STQFN (Top View) SCL/GPIO SDA/GPIO Block Diagram Pin 1 VDD Pin 2 GPI ACMP0 Pin 3 GPIO ACMP1 Pin 4 GPIO ACMP2 Pin 5 GPIO Pin 14...