SLG46824 Overview
The SLG46824 provides a small, low power ponent for monly used Mixed-Signal functions. The user creates the circuit design by programming the multiple time Non-Volatile Memory (NVM) to configure the interconnect logic, the IOs, and the macrocells of the SLG46824. Dual power supply allows to flexibly interface two independent voltage domains.
SLG46824 Key Features
- Two Low Power General Purpose Rail-to-Rail Analog parators (ACMPxL)
- One Voltage Reference
- One Vref Output
- Eleven bination Function Macrocells
- Three Selectable DFF/LATCH or 2-bit LUTs
- One Selectable Programmable Pattern Generator or 2-bit LUT
- Six Selectable DFF/LATCH or 3-bit LUTs
- One Selectable Pipe Delay or Ripple Counter, or 3-bit LUT
- Eight Multi-Function Macrocells
- Seven Selectable DFF/LATCH or 3-bit LUTs + 8-bit Delay/Counters
