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V103A Datasheet PDF

Renesas Electronics V103A

The V103A LVDS display interface transmitter is primarily designed to support pixel data transmission between a video processing engine and a digital video display. The data rate supports up to SXGA+ resolutions and can be used in Plasma, Rear Projector, Front Projector, CRT and LCD display applications. It can also be used in other high-bandwidth parallel data applications and provides a low EMI interconnect over a low cost, low bus width cable up to several meters in length.
Part No. V103A
Datasheet V103A Download
Manufacturer
Renesas Electronics
Description TRIPLE 10-BIT LVDS TRANSMITTER
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V103A datasheet page 1 preview

GENERAL DESCRIPTION

The V103A converts 35 bits of CMOS/TTL data, clocked on the rising or falling edge of an input clock (selectable), into six LVDS (Low Voltage Differential Signaling) serial data stream pairs. In video applications the 35 bits is normally divided into 10 bits for each R, G and B channel and 5 control bits. When combined with the V104 LVDS display interface receiver, the V103A + V104 combination provides a 35-bit wide, 90 MHz transport. The rate of each LVDS channel is 630 Mbps for a 90MHz data input clock, 945 Mbps for 135MHz.

FEATURES

● Pin compatible with THine THC63LVD103
● Wide pixel clock range: 8 - 135 MHz
● Guaranteed operation over -20 to +85° C ambient temperature
● Supports a wide range of video and graphics modes including VGA, SVGA, XGA, SXGA, SXGA+, NTSC, PAL, SDTV, and HDTV up to 1080I or 720P
● Internal PLL requires no external loop filter
● Selectable rising or falling clock edge for data alignment
● Compatible with Spread Spectrum clock source
● Redu...
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