Description
of peripheral hardware, including a J1850 (CLASS2) bus controller, A/D converter, timer, serial interface, and interrupt controller.
Features
- On-chip J1850 (CLASS2) bus controller.
- On-chip ROM and RAM
Item Program Memory
Data Memory
Package
Part Number µPD780833Y
Internal ROM 60 KB
Internal HighSpeed RAM
1024 bytes
Internal Expansion RAM
2048 bytes
80-pin plastic QFP (14 × 14).
- Minimum instruction execution time can be changed from high speed (0.48 µs) to low speed (7.68 µs).
- I/O ports: 65 (N-ch open-drain: 3, TTL input/CMOS output: 8).
- 8-bit resolution A/D converter: 8 channels.
uPD780833Y Datasheet
