RV1106B Datasheet | Rockchip

Overview RV1106B is a highly integrated vision processor So C for IPC, especially for AI related application. It is based on single-core ARM Cortex-A7 32-bit core which integrates NEON and FPU. The build-in NPU supports INT8 operation. In addition, with its strong patibility, network models based on a series of frameworks such as Tensor Flow/MXNet/Py Torch/Caffe can be easily converted. RV1106B introduces a new generation totally hardware-based maximum 8-Megapixel ISP (image signal processor). It implements a lot of algorithm accelerators, such as HDR, 3A, LSC, 3DNR, 2DNR, sharpening, dehaze, gamma correction and so on. Cooperating with two MIPI CSI interface, users can build a system that receives video data from two camera sensors simultaneously. The video encoder embedded in RV1106B supports H.265/H.264 video encoding and the multi-stream encoding is supported also. With the help of this feature , the video from camera can be encoded with higher resolution and stored in local memory and transferred another lower resolution video to cloud storage at the same time. RV1106B has a build-in 16-bit DRAM DDR2/DDR3L capable of sustaining demanding memory bandwidths. Also the RTC, POR and Audio Codec are integrated in RV1106B. 1.2 Features 1.2.1 Application Processor - Single core ARM Cortex-A7 - Full implementation of the ARM architecture v7-A instruction set, ARM Neon Advanced SIMD - Separately Integrated Neon and FPU - 32KB L1 I-Cache and 32KB L1 D-Cache - Unified 128KB L2 Cache for Cortex-A7 - Trust Zone technology support 1.2.2 Memory Organization - Internal on-chip memory - Bootrom - Support system boot from the following device: - SPI interface - e MMC interface - SD/MMC interface - Support system code download by the following interface: - USB2.0 interface - UART interface - 32KB system SRAM - 8KB PMU SRAM - RV1106BG1 SIP 512Mb DDR2 - RV1106BG2 SIP 1Gb DDR3L - RV1106BG3 SIP 2Gb DDR3L - External off-chip memory - e MMC Interface - Fully pliant with JEDEC e MMC 4.51...