BU1924 Datasheet | ROHM

w w t e RDS h /e RBDS decoder S a BU1924 at / BU1924F / BU1924FS .D w Audio ICs 4U m o .c BU1924 / BU1924F / BU1924FS The BU1924, BU1924F and BU1924FS are RDS / RBDS decoders that employ a digital PLL and have a built-in anti-aliasing filter and an eight-stage BPF (switched-capacitor filter). Linear CMOS circuitry is used for low power consumption. z Applications RDS / RBDS patible FM receivers for American and European markets, car stereos, high-fidelity stereo systems and ponents, and FM pagers. z Features 1) Low current. 2) Two-stage anti-aliasing filter (LPF). 3) 57k Hz band-pass filter. 4) DSB demodulation (digital PLL). 5) Quality indication output for demodulated data. z Absolute maximum ratings (Ta = 25°C) Parameter Power supply voltage Maximum input voltage Maximum output voltage Symbol VDD Limits VMax. IMax. Power dissipation Pd Operating temperature Storage temperature ∗1 Reduced by 10.0m W for each increase in Ta of 1°C over 25°C.(BU1924) ∗2 Reduced by 3.0m W for each increase in Ta of 1°C over 25°C.(BU1924F) ∗3 Reduced by 5.0m W for each increase in Ta of 1°C over 25°C.(BU1924FS) z Remended operating conditions (Ta = 25°C) Parameter Power supply voltage Symbol VDD1 VDD2 Min. 2.7 2.7 Typ. - - Max. 5.5 5.5 Unit V V w w w Topr Tstg t a .D - 0.3~+7.0 ±4.0 - 0.3~VDD+0.3 S a e h U 4 t e VDD1 VDD2 All input pins - - - .c m o Unit Conditions m A All output pins 300∗2(BU1924F) - 40~+85 1000∗1(BU1924) m W °C °C 500∗3(BU1924FS) - 55~+125 w w w .D a S a t e e h U 4 t 1/5 m o .c BU1924 / BU1924F / BU1924FS Audio ICs z Block diagram 560p CMP (7) (8) VSS3 MUX 270p (4)...