Description
MCLK
4 17
AVDD AGND AGND
14 1
CP CM CN B[3]/SDO B[2] B[1] B[0]
TIMING CONTROL
15
BANDGAP REFERENCE
18 16
VIN
20
RLC
CDS
PGA
16-bit ADC
L A T C H
13 12 11 10
OFFSET DAC VRLC/VBIAS
19 8 8
RLCDAC
CONTROL REGISTER
DIGITAL INTERFACE
6 9 8 2 7 5
SEN SCK
SDI
DVDD VDDIO DGND
Pin Number
Features
- Silicon monolithic integrated circuit
Single Channel 16-bit CIS/CCD Analog Front End
BU6574FV
Correlated double sampling (CDS) Programmable gain amplifier (8bit resolution) 16bit 6MSPS ADC Serial control interface Offset calibration DAC (8bit resolution) Internally generated voltage references 4bit wide multiplexed data output format Ratings -0.2 to 4.0 -0.2 to 4.0 -0.2 to 4.0 -0.2 to VVDDIO + 0.3 -0.2 to VVDDIO + 0.3 -0.2 to VAVDD + 0.3 -0.2 to VAVDD + 0.3 -25 to 125 400 Unit V V V V V V V.
BU6574FV Datasheet
