MS2652D Datasheet | Ruimeng

DESCRIPTION The MS2652D is low power dissipation, high data rate, two­channel, CMOS, differential LVDS signal bus driver. The supported data receiving rate exceeds 155.5Mbps (77.7MHz). The MS2652D converts TTL/CMOS input signal to low­voltage (425m V), differential output signal. The driver also supports tri­state output function and can be used to shut down output driving stage. According to the shutdown of output current, 11m W static power dissipation could be get. In addition, the MS2652D has power­down shutdown function. When VCC is open­circuit, LVDS output is in high­impedance state. The function can maintain the minimum load on LVDS bus at power down. FEATURES - More than 155.5Mbps (77.7MHz) Switch Frequency - LVDS Output Hi­Z at Power­down - ±425m V Differential Output Signal - Low Power Dissipation - the Maximum 400ps Channel Propagation Delay Difference (5V,25°C) - the Maximum 3.5ns Propagation Delay - Industrial­grade Temperature Application Range - patible with ANSI/TIA/EIA­644 LVDS Standard - DFN10 Package APPLICATIONS - Flat Panel Display Interface - High­speed Data munication - Monitor Camera PRODUCT SPECIFICATION Part Number MS2652D Package DFN10 Marking MS2652D DFN10 Hangzhou Ruimeng Technology Co.,Ltd http://.relmon. VERSION: V1.3 2022.09.05 ­ PAGE 1 ­ PIN CONFIGURATION PIN DESCRIPTION Pin 3, 8 2, 9 1, 10 4 5 6 7 Name Din Dout+ Dout­ GND NC EN- VCC Type I O O ­ ­ I ­ Description CMOS/TTL Input Signal LVDS No­inverting Output LVDS Inverting Output Ground Not Connection Active Low Power Supply, +5V ± 10% Hangzhou Ruimeng Technology Co.,Ltd http://.relmon. VERSION: V1.3 2022.09.05 ­ PAGE 2 ­ BLOCK DIAGRAM Enable EN- H Other...