DESCRIPTION
FINAL FEATURES
DATASHEET ACS8509 SETS The device supports Free-run, Locked and Holdover modes. It also supports all three types of reference clock source: recovered line clock, PDH network, and node synchronization. The ACS8509 generates independent SEC and BITS/SSU clocks, an 8 kHz Frame Synchronization clock and a 2 kHz Multi-Frame Synchronization clock. Two ACS8509 devices can be used together in a Master/ Slave configuration mode allowing system protection against a single ACS8509 failure. A microprocessor port is incorporated, providing access to the configuration and status registers for device setup and monitoring. The ACS8509 includes a choice of edge alignment for 8 kHz input, as well as a low jitter n x E1/DS1 output mode. The User can choose between OCXO or TCXO to define the Stratum and/or Holdover performance required. Block Diagram Figure 1 Block Diagram of the ACS8509 SETS T4 DPLL/Freq. Synthesis Suitable for Stratum 3E*, 3, 4E, 4 and SONET Minimum Clock (S...
Semtech Corporation
