DESCRIPTION
Each driver is capable of driving a 3000p. load in 15ns rise/fall time and has ULTRA-LOW propagation delay from input transition to the gate of the power .ETs. Adaptive Overlap Protection circuit ensures that the synchronous .ET does not turn on until the top .ET source has reached a voltage low enough to prevent shoot-through. The bottom .ET may be disabled at light loads by keeping S_MOD low to trigger asynchronous operation, thus saving the bottom .ETs gate drive current and inductor ripple current. An internal voltage reference allows threshold adjustment for an Output Over-Voltage protection circuitry, independent of the PWM controller. The device provides overvoltage protection independant of the PWM feedback loop with a unique adaptive OVP comparator which rejects noise but responds quickly to a true OVP situation. Under-Voltage-Lock-Out circuit is included to guarantee that both driver outputs are off when Vcc is less than or equal to 4.4V (typ) at supply ramp up (4.35V at supply ramp down).
Semtech Corporation
