Description
1.0
201308/05 Initial version
1.1
2013/10/23 Add DMR T2 support
1.2
2013/11/25 Update description for PLL
1.3
2013/12/16 Remove Pin HSTS
1.4
1/14/2014
Update the HPI Timing
Add support for AMBE+2 Add support for TDMA direct mode,and input clock
1.5
10/27/2014 requirement for TDMA dire
Features
- 7
3 Hardware Architecture
9
4 Pin Configurations
11
5 DPMR and DMR Implementation
13
5.1
Signal Flow for DPMR / DMR Transmitter
14
5.2
Signal Flow for DPMR / DMR Receiver
15
5.3
RF Timing Control for DMR
16
6 Vocoder Support
18
7 Premium Features
19
7.1
Encryption
19
7.2
Voice Recording and Play Back
19
8 Analog Radio Support
20
8.1
Signal Flow for Analog Transmitter
20
8.2
Signal Flow for Analog Receiver
23
9 Hardware Interface
26
9.1
Clock Input
26
9.2.