Description
16 8.1 Status Register (0x0)16 8.2 Control Register (0x0) 17 8.3 Module Identification and IRQ control register (0x4) 18 8.4 Formatter Control/Status Register (0x100)20 8.5 Formatter Module Address register (0x104)21 8.6 FIFO Flag Register (0x108; read only)21 8.7 FIFO Flag IRQ Enable register (0x10
Features
- 3.1 Board Design 6 3.2 SIS3400 CDMS II input stage firmware7 3.2.1 Clock Synchroniser/Clock receiver 8 4 Getting Started 10 5 Front Panel LEDs 11 6 Front Panel Control In/Outputs12 7 VME addressing 13 7.1 Address Space13 7.2 Base Address 13 7.2.1 VME 13 7.3 Address Map14 8 Register.