IRCC2.0
IRCC2.0 is Infrared Communications Controller manufactured by SMSC.
- Part of the IRCC20 comparator family.
- Part of the IRCC20 comparator family.
FEATURES
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- - Multi-Protocol Serial munications Controller Full Ir DA v1.1 Implementation: 2.4 kbps 115.2 kbps, 0.576 Mbps, 1.152 Mbps and 4 Mbps Consumer Infrared (Remote Control) Interface SHARP Amplitude Shift Keyed Infrared (ASK IR) Interface Direct Rx/Tx Infrared Diode Control (Raw) and General Purpose Data Pins Programmable High-Speed Synchronous munications Engine (SCE) with a 128Byte FIFO and Programmable Threshold
- - Programmable DMA Refresh Counter High-Speed NS16C550A-patible Universal Asynchronous Receiver/ Transmitter Interface (ACE UART) with 16Byte Send and Receive FIFOs ISA Single-Byte and Burst-Mode DMA and Interrupt-Driven Programmed I/O with Zero Wait State and String Move Timing 16 Bit CRC-CCITT and 32 Bit IEEE 802 CRC32 Hardware CRC Generators Automatic Transceiver Control Transmit Pulse Width Limiter SCE Transmit Delay Timer IR Media Busy Indicator
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GENERAL DESCRIPTION
This document describes the Infrared munications Controller (Ir CC 2.0) function, which is mon to a number of SMSC products. The Ir CC 2.0 consists of two main architectural blocks: the ACE 16C550A UART and a Synchronous munications Engine (SCE) (Figure 2). It’s own unique register set supports each block. The Ir CC 2.0 UART-driven Ir DA SIR and SHARP ASK modes are backward patible with current SMSC Super I/O and Ultra I/O infrared implementations. The Ir CC 2.0 SCE supports Ir DA v1.1 0.576 Mbps, 1.152 Mbps, 4 Mbps, and Consumer IR modes. All of the SCEdriven modes can use DMA. The Ir CC 2.0 offers flexible signal routing and programmable output control through the Raw mode interface, General Purpose Data pins and Output Multiplexer. Chiplevel address decoding is required to access the Ir CC 2.0 register sets.
TABLE OF CONTENTS
FEATURES
1 GENERAL DESCRIPTION...