ROM36000 Datasheet | SMSC

ROM 36000- ILPC FAMILY 8192 X 8-Bit Static Read-Only Memory 64K ROM Features 08192 X 8 Organization o All Inputs and Outputs TTL-patible o Edge Activated" o Single +5V±10% Power Supply o Maximum Access Time ... 250ns o Minimum Cycle Time ... 375ns o Low Power Consumption ... 220m W max active o Low Standby Power Dissipation ...35m W typical o Three-State Outputs for Wire-OR Expansion o Industry Standard 24 Pin DIP Pin Out o Pin patible with MOSTEK MK36000-4 o On-Chip Address Latches o Outputs drive 2 TTL loads and 100pf o COPLAMOS® N-Channel MOS Technology BLOCK DIAGRAM PIN CONFIGURATION A7 1 A6 2 A5 3 A4 4 A3 5 A2 6 A1 7 A,0 8 01 9 0210 0311 GND 12 24 Vee 23 A8 22 A9 21 A12 20 CE 19 A10 18 A11 17 08 1607 1506 1405 1304 PACKAGE: 24-pin D.I.P. CHIP ENABLE LOGIC Y DECODE X DECODE DATA OUTPUTS 01-08 OUTPUT BUFFERS 'FOR FUTURE RELEASE - - Trademark of MOSTEK Corporation 351 GENERAL DESCRIPTION The ROM 36000 is a new generation N-channel silicon gate MOS Read Only Memory, organized as 8192 words by 8 bits. As a state-of-the-art device, the ROM 36000 incorporates advanced circuit techniques designed to provide maximum circuit density and reliability with the highest possible performance, while maintaining low power dissipation and wide operating margins. The ROM 36000 utilizes what is fast being an industry standard method of device operation. Use of a static storage cell with clocked control periphery allows the circuit to be put into an automatic low power standby mode. This is acplished by maintaining the chip enable (CE) input at a TTL high level. In this mode, power dissipation is reduced to typically 35m W, as pared to unclocked devices which draw full power continuously. In system operation, a device is selected by the CE input, while all others are in a low power mode, reducing the overall system power. Lower power means reduced power supply cost, less heat to dissipate and an increase in device and system reliability. The edge...