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S29NS256N Datasheet Burst Mode Flash Memory

Manufacturer: Spansion (now Infineon)

Overview: www.DataSheet4U.com S29NS-N MirrorBit™ Flash Family S29NS256N, S29NS128N, S29NS064N 256/128/64 Megabit (16/8/4M x 16-bit), CMOS 1.8 Volt-only Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory Data Sheet (Advance Information) S29NS-N MirrorBit™ Flash Family Cover Sheet Notice to Readers: This document states the current technical specifications regarding the Spansion product(s) described herein. Each product described herein may be designated as Advance Information, Preliminary, or Full Production. See Notice On Data Sheet Designations for definitions. Publication Number S29NS-N_00 Revision A Amendment 12 Issue Date June 13, 2006 Notice On Data Sheet Designations Spansion LLC issues data sheets with Advance Information or Preliminary designations to advise readers of product information or intended specifications throughout the product life cycle, including development, qualification, initial production, and full production. In all cases, however, readers are encouraged to verify that they have the latest information before finalizing their design.

Download the S29NS256N datasheet PDF. This datasheet also includes the S29NS-N variant, as both parts are published together in a single manufacturer document.

General Description

s of Spansion data sheet designations are presented here to highlight their presence and definitions.

Advance Information The Advance Information designation indicates that Spansion LLC is developing one or more specific products, but has not committed any design to production.

Information presented in a document with this designation is likely to change, and in some cases, development on the product may discontinue.

Key Features

  • Persistent Sector Protection.
  • A command sector protection method to lock combinations of individual sectors to prevent program or erase operations within that sector.
  • Sectors can be locked and unlocked in-system at VCC level.
  • Multiplexed Data and Address for reduced I/O count.
  • A15.
  • A0 multiplexed as DQ15.
  • DQ0.
  • Addresses are latched by AVD# control input when CE# low.
  • Simultaneous Read/Write operation.
  • Data c.