STP1030 Description
SPARC Technology Business Preliminary STP1030 May 1995 DATA SHEET UltraSPARC-I High-Performance 64-Bit RISC Processor INTRODUCTION The STP1030, UltraSPARC-I, is a high-performance, highly-integrated superscalar processor implementing the SPARC V9 64-bit RISC architecture. The STP1030 is capable of sustaining the execution of up to four instructions per cycle even in the presence of conditional branches and cache...
STP1030 Key Features
- SPARC V9 Architecture pliant
- Binary patible with all SPARC Application code
- VISual (Multimedia Capable) Instruction Set
- Multi-Processing Support
- Glueless 4-processor connection with minimum latency
- Snooping or Directory Based Protocol Support
- 4-way SuperScalar Design with 9 execution units
- 4 Integer Execution Units
- 3 Floating-point Execution Units
- 2 Graphics Execution Units