SST39LF801C Datasheet | SST

Features - Organized as 512K x16 - Single Voltage Read and Write Operations - 2.7-3.6V for SST39VF801C/802C - 3.0-3.6V for SST39LF801C/802C - Security-ID Feature - SST: 128 bits; User: 128 words - Fast Read Access Time: - 70 ns for SST39VF801C/802C - 55 ns for SST39LF801C/802C - Superior Reliability - Endurance: 100,000 Cycles (Typical) - Greater than 100 years Data Retention - Fast Erase and Word-Program: - Sector-Erase Time: 18 ms (typical) - Block-Erase Time: 18 ms (typical) - Chip-Erase Time: 40 ms (typical) - Word-Program Time: 7 µs (typical) - Low Power Consumption (typical values at 5 MHz) - Active Current: 5 m A (typical) - Standby Current: 3 µA (typical) - Auto Low Power Mode: 3 µA (typical) - Automatic Write Timing - Internal VPP Generation - Hardware Block-Protection/WP# Input Pin - Top Block-Protection (top 8 KWord) - Bottom Block-Protection (bottom 8 KWord) - End-of-Write Detection - Toggle Bits - Data# Polling - Ready/Busy# Pin - Sector-Erase Capability - Uniform 2 KWord sectors - CMOS I/O patibility - JEDEC Standard - Flash EEPROM Pinouts and mand sets - Block-Erase Capability - Flexible block architecture; one 8-, two 4-, one 16-, and fifteen 32-KWord blocks - Chip-Erase Capability - Erase-Suspend/Erase-Resume...