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M48T128Y - 1-Mbit SRAM

General Description

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Key Features

  • Integrated, ultra low power SRAM, real-time clock, power-fail control circuit, battery, and crystal ).
  • BCD coded year, month, day, date, hours, t(s minutes, and seconds c.
  • Automatic power-fail chip deselect and WRITE u protection rod.
  • WRITE protect voltage VCC = 4.5 to 5.5 V; 4.1 V ≤ VPFD ≤ 4.5 V P (VPFD = power-fail deselect voltage) te.
  • Conventional SRAM operation; unlimited le WRITE cycles so.
  • Software-controlled clock calibration for high b accuracy applicat.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
M48T128Y 5.0 V, 1 Mbit (128 Kb x 8) TIMEKEEPER® SRAM Not recommended for new design Features ■ Integrated, ultra low power SRAM, real-time clock, power-fail control circuit, battery, and crystal ) ■ BCD coded year, month, day, date, hours, t(s minutes, and seconds c ■ Automatic power-fail chip deselect and WRITE u protection rod ■ WRITE protect voltage VCC = 4.5 to 5.5 V; 4.1 V ≤ VPFD ≤ 4.