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M68AW512D - 8 Mbit 512K x16 3.0V Asynchronous SRAM

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M68AW512D 8 Mbit (512K x16) 3.0V Asynchronous SRAM FEATURES SUMMARY s SUPPLY VOLTAGE: 2.7 to 3.6V s s s s s s Figure 1. Packages 512K x 16 bits SRAM with OUTPUT ENABLE EQUAL CYCLE and ACCESS TIMES: 55, 70ns LOW STANDBY CURRENT LOW VCC DATA RETENTION: 1.5V TRI-STATE COMMON I/O AUTOMATIC POWER DOWN TFBGA48 (ZB) 8 x 10 mm BGA November 2002 1/18 M68AW512D TABLE OF CONTENTS SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .