M74HC40102 Overview
CONTROL INPUTS CLEAR H H H H L APE H H H L X SPE H H L X X CI/CE H L X X X MODE COUNT INHIBIT REGULAR COUNT SYNCHRONOUS PRESET ASYNCRONOUS PRESET CLEAR FUNCTIONAL EVEN IF CLOCK IS GIVEN, NO COUNT IS MADE DOWN COUNT AT RISING EDGE OF CLOCK DATA OF PI TERMINAL IS PRESET AT RISING EDGE OF CLOCK DATA PF PI TERMINAL IS ASYNCHRONOUSLY PRESET TO CLOCK COUNTER IS SET TO MAXIMUM COUNT relationship between control input is indicated in