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M74HCT138 - 3 TO 8 LINE DECODER INVERTING

General Description

The M54/74HC138 is a high speed CMOS 3 TO 8 LINE DECODER fabricated in silicon gate C 2MOS technology.

It has the same high speed performance of LSTTL combined with true CMOSlow power consumption.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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M54HCT138 M74HCT138 3 TO 8 LINE DECODER (INVERTING) . . . . . . . HIGH SPEED tPD = 16 ns (TYP.) at VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA AT TA = 25 °C OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS BALANCED PROPAGATION DELAYS tPLH = tPHL SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) PIN AND FUNCTION COMPATIBLE WITH 54/74LS138 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) DESCRIPTION The M54/74HC138 is a high speed CMOS 3 TO 8 LINE DECODER fabricated in silicon gate C 2MOS technology. It has the same high speed performance of LSTTL combined with true CMOSlow power consumption. If the device is enabled, 3 binary select inputs (A, B and C) determine which one of the outputs will go low.