Datasheet Details
| Part number | M95128 |
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| Manufacturer | STMicroelectronics |
| File Size | 174.59 KB |
| Description | 256/128 Kbit Serial SPI Bus EEPROM With High Speed Clock |
| Datasheet |
 M95128 Datasheet
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General Description
Figure 1.
Table 1.
Key Features
- of the memory device are summarized in Table 3. The hardware write protection, controlled by the W pin, restricts write access to the Status Register (though not to the WIP and WEL bits, which are set or reset by the device internal logic). Bit 7 of the status register (as shown in Table 5) is the Status Register Write Disable bit (SRWD). When this is set to 0 (its initial delivery state) it is possible to write to the status register if the WEL bit (Write Enable Latch) has been set by the WREN.