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M95128 - 256/128 Kbit Serial SPI Bus EEPROM With High Speed Clock

Datasheet Summary

Description

Figure 1.

Table 1.

Features

  • of the memory device are summarized in Table 3. The hardware write protection, controlled by the W pin, restricts write access to the Status Register (though not to the WIP and WEL bits, which are set or reset by the device internal logic). Bit 7 of the status register (as shown in Table 5) is the Status Register Write Disable bit (SRWD). When this is set to 0 (its initial delivery state) it is possible to write to the status register if the WEL bit (Write Enable Latch) has been set by the WREN.

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Datasheet Details

Part number M95128
Manufacturer STMicroelectronics
File Size 174.59 KB
Description 256/128 Kbit Serial SPI Bus EEPROM With High Speed Clock
Datasheet download datasheet M95128 Datasheet
Additional preview pages of the M95128 datasheet.

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Full PDF Text Transcription

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M95256 M95128 256/128 Kbit Serial SPI Bus EEPROM With High Speed Clock PRELIMINARY DATA s s s s SPI Bus Compatible Serial Interface Supports Positive Clock SPI Modes 5 MHz Clock Rate (maximum) Single Supply Voltage: – 4.5V to 5.5V for M95xxx – 2.7V to 3.6V for M95xxx-V – 2.5V to 5.5V for M95xxx-W – 1.8V to 3.6V for M95xxx-R 8 1 PSDIP8 (BN) 0.
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