MJD50
DESCRIPTION
The MJD50 is manufactured using Medium Voltage Epitaxial Planar technology, resulting in a rugged high performance cost-effective transistor.
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol V CBO V CEO V EBO IC I CM IB I BM P t ot T stg Tj Parameter Collector-Base Voltage (IE = 0) Collector-Emitter Voltage (I B = 0) Emitt er-Base Voltage (I C = 0) Collector Current Collector Peak Current (tp < 5 ms) Base Current Base Peak Current (t p < 5 ms) Total Dissipation at T c = 25 o C St orage Temperature Max. Operating Junction T emperature Value 500 400 5 1 2 0.6 1.2 15 -65 to 150 150 Uni t V V V A A A A W o o
January 2000
1/6
THERMAL DATA
R t hj-ca se R t hj- amb Thermal Resistance Junction-case Thermal Resistance Junction-ambient Max Max 8.33 100 o o
C/W C/W
ELECTRICAL CHARACTERISTICS (Tcase = 25 o C unless otherwise specified)
Symb ol I CES I CEO I EBO Parameter Collector Cut-off Current (V BE = 0) Collector Cut-off Current (IB = 0) Emitter Cut-off...
