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SPC560B44L3 - 32-bit MCU family built on the Power Architecture embedded category

Download the SPC560B44L3 datasheet PDF. This datasheet also covers the SPC560B40x variant, as both devices belong to the same 32-bit mcu family built on the power architecture embedded category family and are provided as variant models within a single manufacturer datasheet.

General Description

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10 Package pinouts and signal descriptions

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Key Features

  • High-performance 64 MHz e200z0h CPU.
  • 32-bit Power Architecture® technology.
  • Up to 60 DMIPs operation.
  • Variable length encoding (VLE) Memory.
  • Up to 512 Kbytes Code Flash, with ECC.
  • 64 Kbytes Data Flash, with ECC.
  • Up to 48 Kbytes SRAM, with ECC.
  • 8-entry memory protection unit (MPU) Interrupts.
  • 16 priority levels.
  • Non-maskable interrupt (NMI).
  • Up to 34 ext. int. including 18 wakeup lines GPIO: QFP64/45,.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (SPC560B40x_STMicroelectronics.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com SPC560B40x, SPC560B44x, SPC560B50x SPC560C40x, SPC560C44x, SPC560C50x 32-bit MCU family built on the Power Architecture® embedded category for automotive body electronics applications Features ■ High-performance 64 MHz e200z0h CPU – 32-bit Power Architecture® technology – Up to 60 DMIPs operation – Variable length encoding (VLE) Memory – Up to 512 Kbytes Code Flash, with ECC – 64 Kbytes Data Flash, with ECC – Up to 48 Kbytes SRAM, with ECC – 8-entry memory protection unit (MPU) Interrupts – 16 priority levels – Non-maskable interrupt (NMI) – Up to 34 ext. int.