SPEAr310 Description
5 Architecture overview . 8 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 CPU ARM 926EJ-S . 8 Embedded memory units.
SPEAr310 Key Features
- ARM926EJ-S 333 MHz core High-performance 8-channel DMA Dynamic power-saving features Configurable peripheral functions m
- 32 KB ROM and 8 KB internal SRAM
- LPDDR-333/DDR2-666 external memory interface
- Serial SPI Flash interface
- Flexible static memory controller (FSMC) up to 16-bit data bus width, supporting NAND Flash
- External memory interface (EMI) up to 32bit data bus width, supporting NOR Flash and FPGAs