SSRP105B1 Datasheet | STMicroelectronics

DESCRIPTION The SSRP105B1 is a dual asymmetrical transient voltage suppressor designed to protect a solid-state ring relay or SLICs with integrated ring generator from overvoltages. The asymmetrical protection configuration is necessary to allow the use of all different types of ringing schemes. SO-8 FUNCTIONAL DIAGRAM FEATURES s s s Dual bi-directional asymmetrical protection Stand-off voltages: q Between Line and Ground +105V for positive voltages -180V for negative voltages q Between Line and Line +180V for positive voltages -180V for negative voltages Peak pulse current: IPP = 50A (5/310µs) Holding current: q IH+ = 100m A q IH- = 150m A RING PLY WITH THE FOLLOWING STANDARDS Peak Surge Voltage (V) ITU-T K20 / K21 VDE0433 IEC61000-4-5 FCC Part 68 BELLCORE GR1089 First level 1500 2000 Level 3 Level 4 1500 800 2500 1000 Voltage Waveform (µs) 10/700 10/700 10/700 1.2/50 10/160 10/560 2/10 10/1000 Current Waveform (µs) 5/310 5/310 5/310 8/20 10/160 10/560 2/10 10/1000 Required Peak current (A) 38 50 50 100 200 100 500 100 Min. serial resistor to meet standards (Ω) 18 10 10 19 TM: ASD is trademarks of STMicroelectronics. October 2002 - Ed: 1A 1/6 APPLICATION INFORMATION Fig. 1: Topology of the classical line card protection. R PTC TIP Fig. 2: Classical use of the SSRP105B1. PTC R 2nd 1st LINE PTC stage SLIC TIP stage RING SLIC (- ) PTC R ± VRING RING VRINGBAT Ring generator (- ) SLIC with integrated ring generator or Solid-State Relay The classical line card requires protection before the ring relay and a second one for the SLIC (figure 1). The use of new SLICs with integrated ring generator or board based on solid-state ring relay suppresses this second protection (figure 2). Then, the only remaining stage, located between the line and the ring relay, has to optimize the protection. The classical symmetrical first stage protector bees not sufficient to avoid any circuit...