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ST92195C - (ST92195C/D) 48-96 Kbyte ROM HCMOS MCU

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ST92195C/D 48-96 Kbyte ROM HCMOS MCU WITH ON-SCREEN DISPLAY AND TELETEXT DATA SLICER s s s s s s s s s s s s s s s s s s s s Register File based 8/16 bit Core Architecture with RUN, WFI, SLOW and HALT modes 0°C to +70°C operating temperature range Up to 24 MHz. operation @ 5V±10% Min. instruction cycle time: 165ns at 24 MHz. 48, 56, 64, 84 or 96 Kbytes ROM 256 bytes RAM of Register file (accumulators or index registers) 256 to 512 bytes of on-chip static RAM 2 or 8 Kbytes of TDSRAM (Teletext and Display Storage RAM) 28 fully programmable I/O pins Serial Peripheral Interface Flexible Clock controller for OSD, Data Slicer and Core clocks running from a single low frequency external crystal.