STA2059 Description
STA2059 IN VEHICLE NAVIGATION/TELEMATICS SYSTEM ON CHIP DATA BRIEF.
STA2059 Key Features
- 32-bit RISC MCU with 3-stage pipeline
- Max. CPU frequency ~ 68 MHz
- Fully instructions patible with the ARM7 family of processors
- 8 KByte Instruction + Data cache, 4-way setassociative
- Write buffer de-coupling CPU from system memory during write operations
- MMU for virtual to physical address mapping and memory protection
- 16 KBytes Program RAM Memory
- 4 KBytes on-chip boot ROM
- Digital Audio
- External SDRAM Interface for up to 128