Datasheet4U Logo Datasheet4U.com

STCCP27A - High speed dual differential line receivers

General Description

The STCCP27A receiver converts the subLVDS clock/datastream (up to 416 Mbps throughput bandwidth) back into parallel 8 bits of CMOS/ LVTTL.

📥 Download Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com STCCP27A 1.8V/2.8V High speed dual differential line receivers, Compact camera port decoder, I2C control line Feature summary s SUB-Low voltage differential signaling inputs: VID = 100mV with RT = 100Ω, CL =10pF High signaling rate: fIN = 416MHz max (D+,D-, CLK+, CLK-) fOUT = 52MHz max (D1-D8, CLK) Very high speed: tpLH~tpHL=3.5ns (typ) at VDD=2.8V; VL=1.8V Operating voltage range: VDD(OPR) = 2.65V to 3.6V VL(OPR) =1.65V to 1.95V Symmetrical output impedance (D1-D8, H-SYNC, V-SYNC, CLK): IIOHI=IOL=8mA (min) at VDD=2.65V;VL=1.8V Low power dissipation (Disabled: EN=Gnd): ISOFF = IDD + IL = 10µA (max) CMOS logic input threshold (EN, SYNC_SEL): VIL = 0.3xVDD; VDD =2.65V to 3.6V VIH = 0.7xVDD; VDD =2.65V to 3.