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STLVD210 - DIFFERENTIAL LVDS CLOCK DRIVER

Description

The STLVD210 is a low skew programmable 1-to-5 dual differential LVDS driver, designed with clock distribution in mind.

The LVDS input signals can be either differential or single-ended if the VBB output is used.

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www.DataSheet4U.com STLVD210 DIFFERENTIAL LVDS CLOCK DRIVER s s s s s s s s s 100ps PART-TO-PART SKEW 50ps BANK SKEW DIFFERENTIAL DESIGN MEETS LVDS SPEC. FOR DRIVER OUTPUTS AND RECEIVER INPUTS REFERENCE VOLTAGE AVAILABLE OUTPUT VBB LOW VOLTAGE VCC RANGE OF 2.375V TO 2.625V HIGH SIGNALLING RATE CAPABILITY (EXCEEDS 700MHz) SUPPORT OPEN, SHORT, AND TERMINATED INPUT FAIL-SAFE (LOW OUTPUT STATE) PROGRAMMABLE DRIVERS POWER OFF CONTROL TQFP32 DESCRIPTION The STLVD210 is a low skew programmable 1-to-5 dual differential LVDS driver, designed with clock distribution in mind. The LVDS input signals can be either differential or single-ended if the VBB output is used. The STLVD210 is provided with a 11 bit shift register with a serial in and a Control Register.
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