STR91XF Datasheet | STMicroelectronics

.. STR91x F ARM966E-S™ 16/32-Bit Flash MCU with Ethernet, USB, CAN, AC Motor Control, 4 Timers, ADC, RTC, DMA PRELIMINARY DATA - 16/32-bit 96 MHz ARM9E based MCU - ARM966E-S RISC core: Harvard architecture, 5-stage pipeline, Tightly-Coupled Memories (SRAM and Flash) - STR91x F implementation of core adds highspeed burst Flash memory interface, instruction prefetch queue, branch cache - Up to 96 MIPS directly from Flash memory - Single-cycle DSP instructions are supported - Binary patible with 16/32-bit ARM7 code - Dual burst Flash memories, 32-bits wide - 256KB/512KB Main Flash, 32KB 2nd Flash - Sequential Burst operation up to 96 MHz - 100K min erase cycles, 20 yr min retention - SRAM, 32-bits wide - LQFP80 12 x12mm LQFP128 14 x 14mm - 8-channel, 10-bit A/D converter (ADC) - 0 to 3.6V range, 2 usec conversion time - 11 munication interfaces - 10/100 Ethernet MAC with DMA and MII port - USB Full-speed (12 Mbps) slave device - CAN interface (2.0B Active) - 3 16550-style UARTs with Ir DA protocol - 2 Fast I2C™, 400 k Hz - 2 channels for SPI™, SSI™, or Microwire™ - 8/16-bit EMI bus on 128 pin packages - Up to 80 I/O pins (muxed with interfaces) - 5V tolerant, 16 have high sink current (8m A) - Bit-wise manipulation of pins within a...