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STN4850 Datasheet PDF

STANSON STN4850

STN4850 is the N-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as power management and other battery powered circuits where high-side switching.
Part No. STN4850
Datasheet STN4850 Download
Manufacturer
STANSON
Description N-Channel Enhancement Mode MOSFET
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STN4850 datasheet page 1 preview

DESCRIPTION

PIN CONFIGURATION SOP-8 FEATURE 60V/7.2A, RDS(ON) = 27mΩ (Typ.) @VGS = 10V 60V/6.8A, RDS(ON) = 32mΩ @VGS = 4.5V Super high density cell design for extremely low RDS(ON) Exceptional on-resistance and maximum DC current capability SOP-8 package design PART MARKING Y: Year Code A: Process Code STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA Copyright © 2007, Stanson Corp. STN4850 2010. V1 STN4850 N Channel Enhancement Mode MOSFET 7.2A ABSOULTE

MAXIMUM RATINGS

(Ta = 25℃ Unless otherwise noted ) Parameter Symbol Typical Drain-Source Voltage VDSS 60 Gate-Source Voltage Continuous Drain Current (TJ=150℃) TA=25℃ TA=70℃ Pulsed Drain Current VGSS ID IDM ±20 7.2 6.8 40 Continuous Source Current (Diode Conduction) IS Power Dissipation TA=25℃ TA=70℃ PD Operation Junction Temperature TJ 15 2.5 1.6 -55/150 Storgae Temperature Range TSTG -55/150 Thermal Resistance-Junction to Ambient RθJA 80 Unit V V A A A W ℃ ℃ ℃/W STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA Copyright © 2007, Stanson Corp.
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