DESCRIPTION
PIN CONFIGURATION (D-PAK) FEATURE TO-252 TO-251 -40V/-12.0A, RDS(ON) = 18mΩ (Typ.) @VGS = -10V -40V/-8.0A, RDS(ON) = 24mΩ @VGS =-4.5V Super high density cell design for extremely low RDS(ON) Exceptional on-resistance and maximum DC current capability TO-252,TO-251 package design PART MARKING Y: Year Code A: Week Date Q: Process Code STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA Copyright © 2009, Stanson Corp. STP4189D 2009. V1 STP4189D P Channel Enhancement Mode MOSFET -12.0A ABSOULTE MAXIMUM RATINGS
(Ta = 25℃ Unless otherwise noted ) Parameter Symbol Typical Drain-Source Voltage VDSS -40 Gate-Source Voltage VGSS ±20 Pulsed Drain Current IDM -50 Continuous Source Current (Diode Conduction) IS Power Dissipation TA=25℃ TA=70℃ PD Operation Junction Temperature TJ -20 52.5 31 150 Storgae Temperature Range TSTG -55/150 Thermal Resistance-Junction to Ambient RθJA 50 Unit V V A A W ℃ ℃ ℃/W STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA Copyright © 2009, Stanson Corp.
STANSON
