DESCRIPTION
PIN CONFIGURATION SOP-8 FEATURE -30V/-5.2A, RDS(ON) = 60mΩ @VGS =-10V -30V/-4.5A, RDS(ON) = 80mΩ @VGS = -6.0V -30V/-3.8A, RDS(ON) = 90mΩ @VGS = -4.5V Super high density cell design for extremely low RDS(ON) Exceptional on-resistance and maximum DC current capability SOP-8 package design PART MARKING SOP-8 STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA Copyright © 2007, Stanson Corp. STP4953 2007. V1 STP4953 Dual P Channel Enhancement Mode MOSFET -5.2A ABSOULTE MAXIMUM RATINGS
(Ta = 25 Unless otherwise noted ) Parameter Symbol Drain-Source Voltage VDSS Gate-Source Voltage Continuous Drain Current (TJ=150 ) TA=25 TA=70 Pulsed Drain Current Continuous Source Current (Diode Conduction) Power Dissipation TA=25 TA=70 Operation Junction Temperature VGSS ID IDM IS PD TJ Storgae Temperature Range TSTG Thermal Resistance-Junction to Ambient R JA Typical -30 ±20 -5.2 -4.2 -30 -2.3 2.7 1.8 -55/150 -55/150 70 Unit V V A A A W /W STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA Copyright © 2007, Stanson Corp.