54HC354 Datasheet | STMicroelectronics

DESCRIPTION The M54/74HC354 is a high speed CMOS 8-CHANNEL MULTIPLEXER/REGISTER (3-state) fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL bined with true CMOS low consumption. This device contains an 8 channel digital multiplexer with an 8-bit input data register and a 3-bit address input register with 3-state outputs. The one of eight input data will be provided on the Y output pin (noninverted output) and W output pin (inverted output) determined by the address data. The information at the data inputs (D0 to D7) is stored in the 8-bit latch at the negative pulse on DC input. The information at the address inputs (S0 to S2) is stored in the 3-bit latch at the negative pulse on SC input. These outputs are disabled to be highimpedance when input G1 is held high, input G2 is held high or input G3 is held low. This device is suitable for interfacing with bus lines in a bus organized system. The M54/74HC354 is similar in function to the M54/74HC356, which has an 8-bit flip-flop as the data register instead of an 8-bit latch. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTIONS (top view) NC = No Internal Connection April 1993 1/12 M54/M74HC354 INPUT AND OUTPUT EQUIVALENT CIRCUIT LOGIC DIAGRAM TRUTH TABLE OF INTERNAL LATCH INPUTS OUTPUTS Qn Qn X: DON’T CARE Qn: DATA STORED AT THE TRAILING EDGE OF THE MOST RECENT ST PULSE. 2/12 M54/M74HC354 TRUTH TABLE INPUTS OUTPUTS SELECT -...